ASIC Design Engineer
Responsible for block level/ full chip design for Custom ASIC’s.
• Responsible for block level/ full chip design.
• Develop micro-architecture and RTL implementation for ASIC’s and systems for
high-performance networking products.
• Work with verification engineers to ensure first-time working silicon.
• Perform logic synthesis and timing analysis.
• Work with physical design and signal integrity teams to achieve timing closure in
Our Design Engineers work on the full cycle of ASIC development starting from Micro Architecture,
RTL coding, Synthesis, Floor planning, Timing Closure to tape out.