|Job Title||ASIC/IP Verification Engineer (IP Design Verification)|
|Company||Qualcomm Technologies, Inc.|
|Job Area||Engineering – Hardware|
|Location||India – Bangalore|
|Overview||You will be responsible for understanding the analog-digital partition at system level, develop testplan for functional and circuit performance verification, develop the scalable testbench using the SV-UVM, test case development, debugging, coverage model development, coverage closure. You will be working with analog circuit design team, digital design team, analog modeling, characterization team, SoC integration team to complete the successful core level verification, integration into SoC, post-silicon validation.
Minimum Qualifications Bachelor’s degree in Engineering, Information Systems, Computer Science, or related field. 3+ years Hardware Engineering experience or related work experience.
Education Requirements Required: Bachelor’s, Computer Engineering and/or Computer Science and/or Electronics & Satellites Eng
Preferred: Master’s, Computer Engineering and/or Electronics & Satellites Eng
|Education Requirements||Required: Bachelor’s, Computer Engineering, Computer Science and/or Electrical Engineering.
Preferred: Master’s, Computer Engineering, Computer Science and/or Electrical Engineering.