ASIC/RTL Design Engineer 299 views

Job Description

Sharp ASIC Design Engineers with excellent communication skills who will be part of a fast paced team responsible for delivering high-speed ASICs for large, complex systems and will have a significant opportunity to interact with system design teams across geographies.

Job Responsibilities

  • Define and architect high-performance blocks for the latest, most advanced networking ASICs.
  • Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power.
  • Collaborate with the verification team in the development of the testplan and assist in debugging test failures.
  • Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes.

Education & Experience

  • BE/BTech (Electronics or equivalent)
  • 2+ years of ASIC design experience.
  • Strong Verilog RTL coding skills.
  • Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable.
  • Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus.
  • Knowledge of high performance memory subsystems.
  • Knowledge of multi-domain clock synchronization and high-speed serial interfaces.
  • Strong problem solving and ASIC debugging skills.
  • Excellent written and verbal communications skills.
  • MSEE or BSEE is required.

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