ASIC/SoC/IP Verification Engineer Lead 626 views

Technical Skills Required

  • ASIC/SOC/IP Verification plan definition, testbench environment development in SystemVerilog/UVM
  • Design verification at RTL/Gate level, DV Coverage analysis, Coverage improvement at block and Chip level
  • Support of assertion and coverage-driven methodology
  • Develop test cases to verify functional operation of that the system level
  • Experience in PCIe or NVMe or UFS or SATA or SAS or Ethernet or AXI or DDR protocols
  • Communicate test progress, test results, and other relevant information to project lead
  • Test any new software to ensure integration into company system meets functional requirements, system compliance, and technical specifications
  • Analyze formal test results in order to discover and report any defects, bugs, errors, configuration issues, and interoperability flaws
  • Code and functional coverage objects of different blocks
  • Manage a team of verification engineers to perform the above tasks


2 to 12 Years & above


BE/ ME/ B.Tech/ M.Tech/ MS


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