Microchip Technology is looking for a self-motivated individual to fill the position of DFT engineer in 16bit Microcontroller division (MCU16). Successful candidate will Lead DFT tasks on a MUC16 project. Candidate will work closely with frontend and backend team to successfully implement SCAN,IDDQ and Memory BIST on MCU16 projects. He/she will be responsible for full-chip SCAN implementation, ATPG, Boundary Scan, Memory BIST and post silicon support to improve yield.
– 1 to 5 years of experience in DFT.
– Expert knowledge of DFT architecture on complex design with multiple clock domains.
– Experience in pattern generation and simulations for Test Transition faults, Stuck-at, IDDQ, Bridging fault and Small delay defects .
– Experience in industry standard tools – Mentor Tessent suite, Synopsys DFT compiler, Prime Time etc.
– Experience in building Verification environments to simulate ATPG patterns.
– Experience of working with Teradyne and CTS tester to debug ATPG patterns on silicon.
– Expert knowledge on scan coverage improvement and Test time reduction.
– Excellent debugging and Scripting skills is must.
– Excellent communication and analytical skills
– Experience working with cross functional global teams