Intern 905 views

Summary

The intern will join SeaScape Research and Development team that creates state of the art software for semiconductor analysis. ANSYS RedHawk-SC is the first ANSYS product based on the new SeaScape Elastic Compute Architecture for Electronic Design Automation (EDA). Designed to handle extremely large data sets and computations across distributed machines, ANSYS RedHawk-SC allows designers of advanced system-on- chip designs (SoCs) to assess more electromigration (EM) and voltage drop (IR) scenarios per day and develop a high-level of confidence of their design sign-off.

Responsibilities

  • Learn the team’s software development processes.
  • Diagnose and fix code problems.
  • Deliver code and scripts that meet requirements on schedule. Ensure that code is efficient, scalable, maintainable, extensible, robust and easy to understand.
  • Create unit, regression and/or system-level tests to thoroughly validate new features or changes.
  • Communicate clearly and work closely with manager, technical leads and other engineers to refine solutions and to describe changes that may affect others.
  • Learn and follow best practices in software engineering.

Minimum Qualifications

  • Progressing toward BE / BTech degree or higher in Electrical Engineering, Computer Science or related field
  • Proficiency in Python, C or C+
  • Working knowledge of the Linux operating system
  • Strong basic knowledge of data structures, algorithms, and debugging
  • Basic understanding of electronic design at gate level and/or transistor level
  • Ability to learn quickly, understand complex systems and to work closely with others
  • Ability to complete high-quality work on time

Preferred Qualifications

Knowledge in the following areas are a plus:

  • Commercial software development, including build and test automation
  • Development, debugging and optimization of systems using distributed processing
  • Parasitic extraction for advanced semiconductor nodes
  • Transistor-level simulation or analysis
  • Gate level or RTL power analysis and/or optimization
  • IC physical design

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