Pre-Silicon Logic Validation Engineer 423 views

Job ID: JR0125427

Job Description

The Discrete Graphics SoC Engineering Group within the Graphics and Throughput Computing Hardware Engineering (GTCHE) organization, which is part of the IAGS (Intel Architecture, Graphics and Software) Supergroup, is responsible for the development of discrete Graphics and AI SoCs for Datacenter and Client applications. We are looking for a Logic Design Engineer; in this position, you will be responsible for Logic design (RTL) and SoC integration of CPU subsystems and IPs, working with the architecture, IP, subsystem teams in understanding deliverables, timelines, providing SoC integration requirements, and working with the physical design team on placement, timing and fixing DRC violations. Responsibilities include Register Transfer Level (RTL) design, validation, debug, creation of tools, tests, and scripts and synthesis. Strong programming skills in Verilog, and familiarity with functional validation concepts are very important.

Qualifications

  • Bachelors or Masters degree in Electrical, Electronics or Computer Engineering, or other related field with 15+ years of relevant industry experience, including at least 5 years of RTL design experience.
  • In-depth knowledge of digital logic design, chip architecture and microarchitecture.
  • Strong in communication, leadership, investigation, problem solving & analytical/debugging skills.
  • Proficiency with RTL coding and checkers (LEC, CDC, DFT).
  • Well versed in interface timing budget & clock domain crossing design.
  • Knowledge of VCS, Co-sim, Conformal LEC is an advantage.
  • Familiarity with processor designs, major IPs & sub-systems

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