WLAN Algorithm Design and Modeling Engineer 6785 views

Job Id E1945548
Job Title WLAN Algorithm Design & Modeling Engineer
Post Date 07/12/2016
Company – Division Qualcomm Technologies, Inc. – Mobile and Computing
Job Area Engineering – Hardware
Location India – Bangalore
Job Overview Work on Qualcomms next-generation Wi-Fi physical layer HW modeling, micro-architecture and performance characterization Key Responsibilities: Develop, deliver and maintain fixed-point C++/SystemsC models for physical layer (PHY) hardware implementation of Qualcomms next generation 802.11ax WiFi transceivers Ability to understand various WLAN standards (802.11 a/b/g/n/ac) and 802.11ax draft Models are used as golden reference for design verification (DV) as well as performance characterization and final performance signoffs Perform EVM analysis and fix various bit widths so that the model can be used for bit exact testing on RTL Identify performance deficiencies and propose enhancements to implementation of PHY algorithms Work closely with Standards, Design and Verification teams to ensure timely deliveries of C++ models and verified designs Develop large-scale automation tools and testing infrastructure for code-quality assurance and performance characterization of end-to-end models
Minimum Qualifications Masters degree in Electrical / Electronics Engineering or Computer Science Strong PHY/MAC algorithm and communication system design background Strong verbal and written communication skills, with ability to clearly organize and articulate information Strong fundamentals in at least one of the following domains: wireless communications, digital signal processing, information & coding theory
Preferred Qualifications Ph.D. degree in Electrical / Electronics Engineering or Computer Science Experience in fixed point C++ or SystemC HW model development Experience working with geographically distributed teams
Education Requirements Master’s, Electrical Engineering
Keywords Wireless communications, system design, physical layer, DSP, algorithm design, performance evaluation

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